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Efficient Multiplier for pairings over Barreto-Naehrig Curves on Virtex-6 FPGA
Modular Multiplication Modular Reduction
2013/2/21
This paper is devoted to the design of a 258- bit multiplier for computing pairings over Barreto-Naehrig (BN) curves at 128-bit security level. The proposed design is optimized for Xilinx field progra...
High-Speed Software Implementation of the Optimal Ate Pairing over Barreto-Naehrig Curves
Tate pairing optimal pairing Barreto{Naehrig curve ordinary curve
2010/7/14
This paper describes the design of a fast software library for the computation of the optimal ate pairing on a Barreto--Naehrig elliptic curve. Our library is able to compute the optimal ate pairing o...
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves
ASIP design-space exploration pairing-based cryptograph
2009/6/11
This paper presents a design-space exploration of an applicationspeci
fic instruction-set processor (ASIP) for the computation of various cryptographic
pairings over Barreto-Naehrig curves (BN curve...
Implementing Cryptographic Pairings over Barreto-Naehrig Curves
Barreto-Naehrig Curves Cryptographic Pairings Fp12
2008/5/26
In this paper we describe an e±cient implementation of the
Tate and Ate pairings using Barreto-Naehrig pairing-friendly curves, on
both a standard 32-bit PC and on a 32-bit smartcard. First we intro...